The present disclosure relates to a reference frequency generation circuit which generates a reference clock, and more particularly, relates to frequency correction of the reference clock.
Conventionally, a clock generation circuit such as a PLL and a DLL generates a clock having a desired frequency based on a reference frequency. International Patent Publication No. WO 2010/016167 describes a reference frequency generation circuit which is an example circuit for generating such a reference frequency. In the reference frequency generation circuit described in International Patent Publication No. WO 2010/016167, feedback control is performed so that swings of two oscillation signals generated by an oscillator circuit are constant, thereby reducing frequency fluctuations of the reference clock caused by fluctuations in delay time of an oscillation control circuit.